Starmon-5: Operational specifics

Starmon-5 : Topology and allowed gate set

Each of the quantum processors has a specific topology (the way the qubits are connected) and a specific allowed gate set (supported qubit operations).

Starmon-5 has five qubits connected in a X-shaped configuration. q2 is the central qubit and is connected to every other qubit. All other qubits (q0, q1, q3, q4) couple to q2 only. You can execute the following single- and two-qubit gates on this system (native operations are given in bold, other operations are decomposed using specific decomposition rules for this quantum processor):

• Single-qubit operations
  • X, Y, Z, I
  • Rx(angle), Ry(angle), Rz(angle)
  • X90, Y90, mX90, mY90
  • H
  • S, Sdag, T, Tdag
• Two-qubit operations
  • CZ, CNOT, SWAP
• All measure commands
  • measure_z, measure, measure_all, measure_x, measure_y
• Prep/initialization commands
  • prep_z, prep_y, prep_x

More specific, the following operations and commands are not allowed

• CR, CRk
• Display
• Display_binary
• Not
• Binary controlled operations c-
• Toffoli*

Scheduling user programs: wait/barrier instructions

Programs submitted to Starmon-5 undergo a step of scheduling upon compilation using QuTech’s OpenQL. During scheduling, the operations defined in the user program are rearranged in time according to an as-late-as-possible (ALAP) strategy, in such a way as to execute gates on qubits as late in the sequence of instructions specified by the user, as possible. Scheduling takes into account the duration of various operations in hardware (20 ns for single-qubit operations, 60 ns for two-qubit operations, 2 us for measurements and 150 us for initialization) and various other hardware constraints that are detailed in the fact sheet of Starmon-5.

Users can arbitrarily influence the scheduling of a program through the barrier and wait instructions. The wait is a single-qubit instruction that allows a user to specify how many cycles a qubit should be left idling. The instruction takes as arguments a qubit target (q[4] or q[0:4], for example) and the number of cycles (in steps of 20 ns) that the target should be left idling. Please note that wait instructions applied on multiple qubits are scheduled independently for each qubit.

The barrier instruction is a multi-qubit operation that prevents any optimization or commutation through. Therefore, the instruction can be used to define a scheduling domain within which ALAP scheduling will also take place. The barrier acts as an n-qubit identity gate with zero duration that only applies to the qubits it operates on.

For more details on scheduling within the OpenQL compiler, please refer to https://openql.readthedocs.io/en/latest/gen/reference_passes.html#list-scheduler.

Compiling user programs: gate decomposition and quantization

Programs submitted to Starmon-5 undergo a step of gate decomposition and quantization upon compilation using QuTech’s OpenQL. Non-native gate operations are decomposed, affecting their overall duration. Furthermore, it should be noted that native gate operations resulting from decomposition are still subject to scheduling according to the rules detailed above. For a detailed description of the non-native operations supported in the backend, and their respective decompositions, please refer to the fact sheet for Starmon-5. Finally, single-qubit arbitrary rotations are quantized to the nearest multiple of pi*0.03125.

Result format: parallel and sequential measurements

The result format strictly depends on the structure of measurements programmed by the user. Therefore, results are organized in a 3-dimensional array where the outer-most dimension encodes the various shots of a circuit requested by the user, the second dimension encodes the various measurements performed in sequence for a specific circuit, and the inner-most dimension encodes the various bit-results of the measurements performed in parallel within that same circuit.

Measurements performed on multiple-qubit targets (q[0:4], for example) are still subject to scheduling. Therefore, barrier instructions should be used when trying to ensure that measurements are performed in parallel.